Trench structures are commonly used for controlling high voltages and high currents among integrated circuit devices. The trench structure is a gap formed in the slide of a semiconductor substrate between devices on the substrate. The structure allows relatively high voltages and currents to be used in dense circuit arrangements.
Some devices, such as the metal-oxide semiconductor-controlled thyristor (MCT), are used for high power applications. This necessitates the forming of arrays of densely packed trenches across an entire wafer. The MCT devices place inversion and accumulation channel regions perpendicular to the surface plane to control current flow normal to the surface. Therefore, trench structures are fabricated vertically (vs. a planar configuration) such that power flows from a wafer""s top surface (gate/source) to the wafer""s bottom surface (drain).
The sharp corners at the bottom of the trenches are know to be sources of device failure or degradation, as electrical fields concentrate at these corners. Additionally, gate oxide will often become thinned at the corners, increasing the importance of having high quality oxide in the structure.
FIG. 1 schematically shows prior art for power semiconductor devices using a trench structure. Only a single trench is shown, however it is a common practice to have a plurality of trenches formed with other layers, regions and interconnections. Trench structure 10 is formed in a substrate 12, such as semiconductor silicon, by etching the semiconductor in a plasma or reactive ion process for example. Such a process achieves a high degree of anisotropy to thereby form nearly vertical sidewalls and thus decrease the lateral dimensions on the semiconductor wafer.
An insulating layer 14 is then formed on the walls of the trench. Insulating layer 14 is typically silicon dioxide. Such silicon dioxide is commonly formed by growing a thermal oxide on the silicon such as by exposing the silicon to an oxygen environment at elevated tenmperatures. Conductive layer 16 is then formed in the trench, such as through depositions, doping and patterning as commonly practiced in the semiconductor fabrication art.
Conductive layer 16 is typically polycrystalline silicon (polysilicon) containing dopant impurities. The close-up region in FIG. 1 shows a corner 18 at the base of trench 10. The corner formed by the xe2x80x9cdryxe2x80x9d etching processes of plasma or reactiveion etching is an angular corner approximating a right angle. Forming an insulating layer at such a tight corner is difficult, resulting in a thinning 20 of the insulator in that vicinity. The thinner insulator promotes an increase in electric field and an enhancement of dielectric breakdown at high voltages.
There is thus a need for an improved trench structure that does not suffer from the effects of dielectric breakdown and electric field concentration.
The invention describes an improved method of fabricating trench structures. Such an improvement enhances trench structure reliability by reducing dielectric breakdown in high voltage applications for example. An important consideration in trench devices is the smoothing of the trench corners to thereby reduce the electrical fields that cause such insulator breakdown The invention is a process for rounding and smoothing the trench bottom through etching and thermal oxidation techniques.
An object of this invention is to provide more efficient trench structures.
Another object of this invention is to provide trench structures that minimize electric field concentration and dielectric breakdown in the structures.
Still another object of this invention is to provide a trench structure having rounded trench corners.
Yet another object of this invention is to provide a process for promoting the above described objects.